Información de la conferencia
DVCon Europe 2020: The Design and Verification Conference in Europe
https://dvcon-europe.org/Día de Entrega: |
2020-05-11 Extended |
Fecha de Notificación: |
2020-09-14 |
Fecha de Conferencia: |
2020-10-27 |
Ubicación: |
Munich, Germany |
Años: |
7 |
Vistas: 11470 Seguidores: 0 Asistentes: 0
Solicitud de Artículos
The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation or integration. It is a place where the latest methodologies and technologies for the industrial use of tools, languages, and standards for integrated and embedded systems and products are shared and discussed.
The conference covers the application of standards, methodologies, and flows for system-level, hardware and software design, verification, validation, design automation and IP reuse.
Industry applications of interest include (but not limited to) automotive, mobile communication, aerospace, healthcare, chip-cards, consumer and power electronics. DVCon Europe solicits submissions related to advanced design and verification on special interest areas such as Digital Twin, Machine Learning, Internet-of-things, Functional safety and security, AI, ADAS and digitalization.
DVCon Europe 2020 accepts submissions of papers, tutorials and panels with highly technical content reflecting real life experiences. The following are example topics.
SYSTEM-LEVEL AND SOFTWARE DESIGN
Virtual prototyping and Digital Twins
Transaction-level modeling (e.g., SystemC TLM)
Hardware-assisted prototyping
Hardware/software/embedded co-design
Machine Learning
MODEL-BASED AND MODEL SUPPORTED SOFTWARE DESIGN
Software for verification
Software development and verification
Model based software design
Low level software design and verification
Model based tools and techniques for application level software.
VERIFICATION & VALIDATION
Verification process, reuse and resource management
Methods bridging between verification and validation
Hardware/software co-verification
Advanced methodologies, testbenches, and flows (e.g., UVM, HDLs, HVLs)
Formal and semi-formal V&V techniques
IP REUSE & DESIGN AUTOMATION
High-level synthesis from ESL languages
Interoperability of models and/or tools
IP tagging, protection or security
SoC and IP integration methods, flows, and tools
Configuration management of IPs including different abstraction level
Flow and tool automation (e.g., IP-XACT)
FUNCTIONAL SAFETY AND SECURITY
Methods and flows for functional safety standard compliance (e.g., ISO 26262, DO-254)
Safety and security in verification and validation
Requirements-driven design and verification including traceability
New methods and tools supporting functional safety and security
MIXED-SIGNAL AND LOW-POWER DESIGN AND VERIFICATION
AMS modeling for concept and system-level design
Application of mixed-signal extensions in verification (e.g., UVM-MS)
Real-number modeling approaches
Self-checking testbenches in analog verification
Low-power design and verification (e.g., UPF)
Última Actualización Por Dou Sun en 2020-05-01
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| Abreviación | Nombre Completo | Conferencia |
|---|---|---|
| CDVE | International Conference on Cooperative Design, Visualization and Engineering | 2025-10-19 |
| ICMIC' | International Conference on Modelling, Identification and Control | 2014-12-03 |
| MIC | International Conference on Modelling, Identification and Control | 2017-02-20 |
| DAC | Design Automation Conference | 2026-07-26 |
| DRCN | International Conference on Design of Reliable Communication Networks | 2023-04-17 |
| CAV | International Conference on Computer Aided Verification | 2025-07-21 |
| ICST | International Conference on Software Testing, Verification and Validation | 2026-05-18 |
| RV | International Conference on Runtime Verification | 2025-09-15 |
| HVC | Haifa Verification Conference | 2016-11-14 |
| DATE | Design, Automation and Test in Europe | 2026-04-20 |
Revistas Relacionadas
| CCF | Nombre Completo | Factor de Impacto | Editor | ISSN |
|---|---|---|---|---|
| Software Testing Verification and Reliability | 1.500 | Wiley-Blackwell | 0960-0833 | |
| b | Software Testing, Verification and Reliability | 1.500 | John Wiley & Sons, Ltd | 1099-1689 |
| Modeling, Identification and Control | The Research Council of Norway | 0332-7353 | ||
| International Journal of Modelling, Identification and Control | 0.600 | Inderscience | 1746-6172 | |
| b | ACM Transactions on Design Automation of Electronic Systems | 2.200 | ACM | 1084-4309 |
| International journal of VLSI Design & Communication Systems | AIRCC | 0976-1527 | ||
| IEEE Electrification Magazine | 3.400 | IEEE | 2325-5897 | |
| Design Automation for Embedded Systems | 0.900 | Springer | 0929-5585 | |
| Journal of Classification | 1.800 | Springer | 0176-4268 | |
| IEEE Open Journal of the Communications Society | 6.1 | IEEE | 2644-125X |
| Nombre Completo | Factor de Impacto | Editor |
|---|---|---|
| Software Testing Verification and Reliability | 1.500 | Wiley-Blackwell |
| Software Testing, Verification and Reliability | 1.500 | John Wiley & Sons, Ltd |
| Modeling, Identification and Control | The Research Council of Norway | |
| International Journal of Modelling, Identification and Control | 0.600 | Inderscience |
| ACM Transactions on Design Automation of Electronic Systems | 2.200 | ACM |
| International journal of VLSI Design & Communication Systems | AIRCC | |
| IEEE Electrification Magazine | 3.400 | IEEE |
| Design Automation for Embedded Systems | 0.900 | Springer |
| Journal of Classification | 1.800 | Springer |
| IEEE Open Journal of the Communications Society | 6.1 | IEEE |